#######################################################
# Company:          Beijing ICfusion technology Co.Ltd
# Website:          http://www.icfusion.cn/
# Create Date:      17/02/2020
#
# Design Name:      Zhanng Shuai
# Target Devices:   PRX100T-V3.0 (SRAM-1M)
#
# Revision:         V1.0

#==================================================
#clk
set_property -dict {PACKAGE_PIN U22 IOSTANDARD LVCMOS33} [get_ports IN_CLK_50M]
create_clock -period 20.000 -name IN_CLK_50M -waveform {0.000 10.000} [get_ports IN_CLK_50M]

#==================================================
#key

set_property -dict {PACKAGE_PIN M4 IOSTANDARD LVCMOS33} [get_ports {PB[1]}]
set_property -dict {PACKAGE_PIN L4 IOSTANDARD LVCMOS33} [get_ports {PB[2]}]
set_property -dict {PACKAGE_PIN L5 IOSTANDARD LVCMOS33} [get_ports {PB[3]}]
set_property -dict {PACKAGE_PIN K5 IOSTANDARD LVCMOS33} [get_ports {PB[4]}]
set_property -dict {PACKAGE_PIN R1 IOSTANDARD LVCMOS33} [get_ports {PB[5]}]
set_property -dict {PACKAGE_PIN P1 IOSTANDARD LVCMOS33} [get_ports {PB[6]}]
set_property -dict {PACKAGE_PIN R7 IOSTANDARD LVCMOS33} [get_ports {PB[7]}]

#==================================================
#sw

set_property -dict {PACKAGE_PIN N8 IOSTANDARD LVCMOS33} [get_ports {SW[0]}]
set_property -dict {PACKAGE_PIN M5 IOSTANDARD LVCMOS33} [get_ports {SW[1]}]
set_property -dict {PACKAGE_PIN P4 IOSTANDARD LVCMOS33} [get_ports {SW[2]}]
set_property -dict {PACKAGE_PIN N4 IOSTANDARD LVCMOS33} [get_ports {SW[3]}]
set_property -dict {PACKAGE_PIN U6 IOSTANDARD LVCMOS33} [get_ports {SW[4]}]
set_property -dict {PACKAGE_PIN U5 IOSTANDARD LVCMOS33} [get_ports {SW[5]}]
set_property -dict {PACKAGE_PIN R8 IOSTANDARD LVCMOS33} [get_ports {SW[6]}]
set_property -dict {PACKAGE_PIN P8 IOSTANDARD LVCMOS33} [get_ports {SW[7]}]

#==================================================
#seven_tube_seg

set_property -dict {PACKAGE_PIN K26 IOSTANDARD LVCMOS33} [get_ports {SEG[0]}]
set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS33} [get_ports {SEG[1]}]
set_property -dict {PACKAGE_PIN L20 IOSTANDARD LVCMOS33} [get_ports {SEG[2]}]
set_property -dict {PACKAGE_PIN N21 IOSTANDARD LVCMOS33} [get_ports {SEG[3]}]
set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS33} [get_ports {SEG[4]}]
set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS33} [get_ports {SEG[5]}]
set_property -dict {PACKAGE_PIN P23 IOSTANDARD LVCMOS33} [get_ports {SEG[6]}]
set_property -dict {PACKAGE_PIN P24 IOSTANDARD LVCMOS33} [get_ports {SEG[7]}]
set_property -dict {PACKAGE_PIN R16 IOSTANDARD LVCMOS33} [get_ports {SEAT[5]}]
set_property -dict {PACKAGE_PIN R17 IOSTANDARD LVCMOS33} [get_ports {SEAT[4]}]
set_property -dict {PACKAGE_PIN N18 IOSTANDARD LVCMOS33} [get_ports {SEAT[3]}]
set_property -dict {PACKAGE_PIN K25 IOSTANDARD LVCMOS33} [get_ports {SEAT[2]}]
set_property -dict {PACKAGE_PIN R25 IOSTANDARD LVCMOS33} [get_ports {SEAT[1]}]
set_property -dict {PACKAGE_PIN T24 IOSTANDARD LVCMOS33} [get_ports {SEAT[0]}]

#==================================================
#led

set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS33} [get_ports LED]


#==================================================
#uart

set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS33} [get_ports TXD]
set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS33} [get_ports RXD]

#==================================================
#hdmi

set_property -dict {PACKAGE_PIN C24 IOSTANDARD LVCMOS33} [get_ports VGA_HS]
set_property -dict {PACKAGE_PIN A25 IOSTANDARD LVCMOS33} [get_ports VGA_VS]
set_property -dict {PACKAGE_PIN A24 IOSTANDARD LVCMOS33} [get_ports VGA_EN]
set_property -dict {PACKAGE_PIN B19 IOSTANDARD LVCMOS33} [get_ports VGA_CLK]

#==================================================
#hdmi&lcd
set_property -dict {PACKAGE_PIN H14 IOSTANDARD LVCMOS33} [get_ports TFT_CS]
set_property -dict {PACKAGE_PIN A17 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[16]}]
set_property -dict {PACKAGE_PIN C17 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[17]}]
set_property -dict {PACKAGE_PIN F17 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[18]}]
set_property -dict {PACKAGE_PIN E17 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[19]}]
set_property -dict {PACKAGE_PIN G17 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[20]}]
set_property -dict {PACKAGE_PIN D16 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[21]}]
set_property -dict {PACKAGE_PIN E16 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[22]}]
set_property -dict {PACKAGE_PIN F15 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[23]}]
set_property -dict {PACKAGE_PIN A20 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[8]}]
set_property -dict {PACKAGE_PIN B20 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[9]}]
set_property -dict {PACKAGE_PIN A19 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[10]}]
set_property -dict {PACKAGE_PIN D20 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[11]}]
set_property -dict {PACKAGE_PIN D19 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[12]}]
set_property -dict {PACKAGE_PIN A18 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[13]}]
set_property -dict {PACKAGE_PIN C18 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[14]}]
set_property -dict {PACKAGE_PIN B17 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[15]}]
set_property -dict {PACKAGE_PIN B24 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[0]}]
set_property -dict {PACKAGE_PIN D21 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[1]}]
set_property -dict {PACKAGE_PIN A23 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[2]}]
set_property -dict {PACKAGE_PIN C22 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[3]}]
set_property -dict {PACKAGE_PIN B22 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[4]}]
set_property -dict {PACKAGE_PIN A22 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[5]}]
set_property -dict {PACKAGE_PIN C21 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[6]}]
set_property -dict {PACKAGE_PIN B21 IOSTANDARD LVCMOS33} [get_ports {HDMI_D[7]}]

set_property -dict {PACKAGE_PIN E21 IOSTANDARD LVCMOS33} [get_ports {HDMI_I2S[3]}]
set_property -dict {PACKAGE_PIN C26 IOSTANDARD LVCMOS33} [get_ports {HDMI_I2S[2]}]
set_property -dict {PACKAGE_PIN D24 IOSTANDARD LVCMOS33} [get_ports {HDMI_I2S[1]}]
set_property -dict {PACKAGE_PIN B26 IOSTANDARD LVCMOS33} [get_ports {HDMI_I2S[0]}]

#==================================================
#aduio

set_property -dict {PACKAGE_PIN H15 IOSTANDARD LVCMOS33} [get_ports WM_LRCK]
set_property -dict {PACKAGE_PIN F18 IOSTANDARD LVCMOS33} [get_ports WM_SCLK]
set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS33} [get_ports WM_MISO]
set_property -dict {PACKAGE_PIN F20 IOSTANDARD LVCMOS33} [get_ports WM_MOSI]
set_property -dict {PACKAGE_PIN H17 IOSTANDARD LVCMOS33} [get_ports WM_MCLK]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets WM_SCLK_IBUF]

#==================================================
#i2c
set_property -dict {PACKAGE_PIN R21 IOSTANDARD LVCMOS33} [get_ports SDA]
set_property -dict {PACKAGE_PIN R20 IOSTANDARD LVCMOS33} [get_ports SCL]

#==================================================
#internet

set_property -dict {PACKAGE_PIN F22 IOSTANDARD LVCMOS33} [get_ports E_MDC]
set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS33} [get_ports E_MDIO]
set_property -dict {PACKAGE_PIN L14 IOSTANDARD LVCMOS33} [get_ports {E_RXD[0]}]
set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS33} [get_ports {E_RXD[1]}]
set_property -dict {PACKAGE_PIN J14 IOSTANDARD LVCMOS33} [get_ports {E_RXD[2]}]
set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS33} [get_ports {E_RXD[3]}]
set_property -dict {PACKAGE_PIN K16 IOSTANDARD LVCMOS33} [get_ports {E_TXD[0]}]
set_property -dict {PACKAGE_PIN K17 IOSTANDARD LVCMOS33} [get_ports {E_TXD[1]}]
set_property -dict {PACKAGE_PIN K18 IOSTANDARD LVCMOS33} [get_ports {E_TXD[2]}]
set_property -dict {PACKAGE_PIN H19 IOSTANDARD LVCMOS33} [get_ports {E_TXD[3]}]
set_property -dict {PACKAGE_PIN M14 IOSTANDARD LVCMOS33} [get_ports E_RXDV]
set_property -dict {PACKAGE_PIN G20 IOSTANDARD LVCMOS33} [get_ports E_TXEN]
set_property -dict {PACKAGE_PIN K21 IOSTANDARD LVCMOS33} [get_ports E_RXC]
set_property -dict {PACKAGE_PIN J16 IOSTANDARD LVCMOS33} [get_ports E_TXC]


#==================================================
#adda

set_property -dict {PACKAGE_PIN E20 IOSTANDARD LVCMOS33} [get_ports ADDA_IIC_SCL]
set_property -dict {PACKAGE_PIN C19 IOSTANDARD LVCMOS33} [get_ports ADDA_IIC_SDA]

#==================================================
#sram

set_property -dict {PACKAGE_PIN U21 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[0]}]
set_property -dict {PACKAGE_PIN U25 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[1]}]
set_property -dict {PACKAGE_PIN W26 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[2]}]
set_property -dict {PACKAGE_PIN Y26 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[3]}]
set_property -dict {PACKAGE_PIN AA25 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[4]}]
set_property -dict {PACKAGE_PIN AB26 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[5]}]
set_property -dict {PACKAGE_PIN AA24 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[6]}]
set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[7]}]
set_property -dict {PACKAGE_PIN AC24 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[8]}]
set_property -dict {PACKAGE_PIN AC26 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[9]}]
set_property -dict {PACKAGE_PIN AB25 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[10]}]
set_property -dict {PACKAGE_PIN Y23 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[11]}]
set_property -dict {PACKAGE_PIN Y25 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[12]}]
set_property -dict {PACKAGE_PIN W25 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[13]}]
set_property -dict {PACKAGE_PIN V26 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[14]}]
set_property -dict {PACKAGE_PIN U26 IOSTANDARD LVCMOS33}  [get_ports {SRAM_DATA[15]}]

set_property -dict {PACKAGE_PIN T14 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[16]}]
set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[17]}]
set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[18]}]
set_property -dict {PACKAGE_PIN U17 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[19]}]
set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[20]}]
set_property -dict {PACKAGE_PIN T18 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[21]}]
set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[22]}]
set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[23]}]
set_property -dict {PACKAGE_PIN W21 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[24]}]
set_property -dict {PACKAGE_PIN Y22 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[25]}]
set_property -dict {PACKAGE_PIN Y21 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[26]}]
set_property -dict {PACKAGE_PIN U20 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[27]}]
set_property -dict {PACKAGE_PIN T20 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[28]}]
set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[29]}]
set_property -dict {PACKAGE_PIN Y20 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[30]}]
set_property -dict {PACKAGE_PIN V19 IOSTANDARD LVCMOS33} [get_ports {SRAM_DATA[31]}]


set_property -dict {PACKAGE_PIN E26 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[0]}]
set_property -dict {PACKAGE_PIN E25 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[1]}]
set_property -dict {PACKAGE_PIN D26 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[2]}]
set_property -dict {PACKAGE_PIN D25 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[3]}]
set_property -dict {PACKAGE_PIN G22 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[4]}]
set_property -dict {PACKAGE_PIN H18 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[5]}]
set_property -dict {PACKAGE_PIN M15 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[6]}]
set_property -dict {PACKAGE_PIN M16 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[7]}]
set_property -dict {PACKAGE_PIN L15 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[8]}]
set_property -dict {PACKAGE_PIN K23 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[9]}]
set_property -dict {PACKAGE_PIN J25 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[10]}]
set_property -dict {PACKAGE_PIN K22 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[11]}]
set_property -dict {PACKAGE_PIN H26 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[12]}]
set_property -dict {PACKAGE_PIN J26 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[13]}]
set_property -dict {PACKAGE_PIN J24 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[14]}]
set_property -dict {PACKAGE_PIN G25 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[15]}]
set_property -dict {PACKAGE_PIN G24 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[16]}]
set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[17]}]
#set_property -dict {PACKAGE_PIN J23 IOSTANDARD LVCMOS33} [get_ports {SRAM_ADDR[18]}]

set_property -dict {PACKAGE_PIN F25 IOSTANDARD LVCMOS33} [get_ports SRAM0_CS_N]
set_property -dict {PACKAGE_PIN L19 IOSTANDARD LVCMOS33} [get_ports SRAM0_WE_N]
set_property -dict {PACKAGE_PIN H23 IOSTANDARD LVCMOS33} [get_ports SRAM0_OE_N]
set_property -dict {PACKAGE_PIN H24 IOSTANDARD LVCMOS33} [get_ports SRAM0_UB_N]
set_property -dict {PACKAGE_PIN G26 IOSTANDARD LVCMOS33} [get_ports SRAM0_LB_N]

set_property -dict {PACKAGE_PIN E23 IOSTANDARD LVCMOS33} [get_ports SRAM1_CS_N]
set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS33} [get_ports SRAM1_WE_N]
set_property -dict {PACKAGE_PIN F23 IOSTANDARD LVCMOS33} [get_ports SRAM1_OE_N]
set_property -dict {PACKAGE_PIN F24 IOSTANDARD LVCMOS33} [get_ports SRAM1_UB_N]
set_property -dict {PACKAGE_PIN K20 IOSTANDARD LVCMOS33} [get_ports SRAM1_LB_N]

#==================================================
#pci
#set_property -dict {PACKAGE_PIN K2 IOSTANDARD LVCMOS33} [get_ports CAM1_SENSOR_0_RESET]
#set_property -dict {PACKAGE_PIN R6 IOSTANDARD LVCMOS33} [get_ports CAM1_SENSOR_0_CLK]
#set_property -dict {PACKAGE_PIN L3 IOSTANDARD LVCMOS33} [get_ports CAM1_RESERVED]
#
#set_property -dict {PACKAGE_PIN R3 IOSTANDARD LVCMOS33} [get_ports CM_R1_CK_P]
#set_property -dict {PACKAGE_PIN P3 IOSTANDARD LVCMOS33} [get_ports CM_R1_CK-N]
#set_property -dict {PACKAGE_PIN K1 IOSTANDARD LVCMOS33} [get_ports CM_R0_D0_P]
#set_property -dict {PACKAGE_PIN J1 IOSTANDARD LVCMOS33} [get_ports CM_R0_D0_N]
#set_property -dict {PACKAGE_PIN N1 IOSTANDARD LVCMOS33} [get_ports CM_R0_D1_P]
#set_property -dict {PACKAGE_PIN M1 IOSTANDARD LVCMOS33} [get_ports CM_R0_D1_N]
#set_property -dict {PACKAGE_PIN M7 IOSTANDARD LVCMOS33} [get_ports CM_R0_D2_P]
#set_property -dict {PACKAGE_PIN L7 IOSTANDARD LVCMOS33} [get_ports CM_R0_D2_N]
#set_property -dict {PACKAGE_PIN U2 IOSTANDARD LVCMOS33} [get_ports CM_R0_D3_P]
#set_property -dict {PACKAGE_PIN U1 IOSTANDARD LVCMOS33} [get_ports CM_R0_D3_N]
#
#set_property -dict {PACKAGE_PIN N3 IOSTANDARD LVCMOS33} [get_ports CM_R0_CK_P]
#set_property -dict {PACKAGE_PIN N2 IOSTANDARD LVCMOS33} [get_ports CM_R0_CK-N]
#set_property -dict {PACKAGE_PIN M2 IOSTANDARD LVCMOS33} [get_ports CM_R1_D0_P]
#set_property -dict {PACKAGE_PIN L2 IOSTANDARD LVCMOS33} [get_ports CM_R1_D0_N]
#set_property -dict {PACKAGE_PIN N7 IOSTANDARD LVCMOS33} [get_ports CM_R1_D1_P]
#set_property -dict {PACKAGE_PIN N6 IOSTANDARD LVCMOS33} [get_ports CM_R1_D1_N]
#set_property -dict {PACKAGE_PIN T5 IOSTANDARD LVCMOS33} [get_ports CM_R1_D2_P]
#set_property -dict {PACKAGE_PIN R5 IOSTANDARD LVCMOS33} [get_ports CM_R1_D2_N]
#set_property -dict {PACKAGE_PIN T4 IOSTANDARD LVCMOS33} [get_ports CM_R1_D3_P]
#set_property -dict {PACKAGE_PIN T3 IOSTANDARD LVCMOS33} [get_ports CM_R1_D3_N]

#set_property -dict {PACKAGE_PIN H2 IOSTANDARD LVCMOS33} [get_ports CAM1_SPI_CAMCLK]
#set_property -dict {PACKAGE_PIN H1 IOSTANDARD LVCMOS33} [get_ports CAM1_SPI_CAMMISO]
#set_property -dict {PACKAGE_PIN J3 IOSTANDARD LVCMOS33} [get_ports CAM1_SPI_CAMOSI]
#set_property -dict {PACKAGE_PIN K3 IOSTANDARD LVCMOS33} [get_ports CAM1_SPI_CAMCS]

#set_property -dict {PACKAGE_PIN P5 IOSTANDARD LVCMOS33} [get_ports CAM1_HS_0]
#set_property -dict {PACKAGE_PIN P6 IOSTANDARD LVCMOS33} [get_ports CAM1_VS_0]


set_property -dict {PACKAGE_PIN K2 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[0]}]
set_property -dict {PACKAGE_PIN R6 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[1]}]
set_property -dict {PACKAGE_PIN L3 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[2]}]

set_property -dict {PACKAGE_PIN R3 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[3]}]
set_property -dict {PACKAGE_PIN P3 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[4]}]
set_property -dict {PACKAGE_PIN K1 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[5]}]
set_property -dict {PACKAGE_PIN J1 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[6]}]
set_property -dict {PACKAGE_PIN N1 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[7]}]
set_property -dict {PACKAGE_PIN M1 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[8]}]
set_property -dict {PACKAGE_PIN M7 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[9]}]
set_property -dict {PACKAGE_PIN L7 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[10]}]
set_property -dict {PACKAGE_PIN U2 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[11]}]
set_property -dict {PACKAGE_PIN U1 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[12]}]

set_property -dict {PACKAGE_PIN N3 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[13]}]
set_property -dict {PACKAGE_PIN N2 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[14]}]
set_property -dict {PACKAGE_PIN M2 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[15]}]
set_property -dict {PACKAGE_PIN L2 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[16]}]
set_property -dict {PACKAGE_PIN N7 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[17]}]
set_property -dict {PACKAGE_PIN N6 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[18]}]
set_property -dict {PACKAGE_PIN T5 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[19]}]
set_property -dict {PACKAGE_PIN R5 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[20]}]
set_property -dict {PACKAGE_PIN T4 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[21]}]
set_property -dict {PACKAGE_PIN T3 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[22]}]

set_property -dict {PACKAGE_PIN H2 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[23]}]
set_property -dict {PACKAGE_PIN H1 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[24]}]
set_property -dict {PACKAGE_PIN J3 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[25]}]
set_property -dict {PACKAGE_PIN K3 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[26]}]

set_property -dict {PACKAGE_PIN P5 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[27]}]
set_property -dict {PACKAGE_PIN P6 IOSTANDARD LVCMOS33} [get_ports {CAM_BUS[28]}]
#==================================================
#pmod

#P1
#set_property -dict {PACKAGE_PIN V21 IOSTANDARD LVCMOS33} [get_ports IO7]
#set_property -dict {PACKAGE_PIN V22 IOSTANDARD LVCMOS33} [get_ports IO6]
#set_property -dict {PACKAGE_PIN V23 IOSTANDARD LVCMOS33} [get_ports IO4]
#set_property -dict {PACKAGE_PIN U24 IOSTANDARD LVCMOS33} [get_ports IO0]
#
#set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS33} [get_ports IO2]
#set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS33} [get_ports IO3]
#set_property -dict {PACKAGE_PIN W23  IOSTANDARD LVCMOS33} [get_ports IO5]
#set_property -dict {PACKAGE_PIN V24  IOSTANDARD LVCMOS33} [get_ports IO1]

set_property -dict {PACKAGE_PIN V21 IOSTANDARD LVCMOS33} [get_ports {P1[0]}]
set_property -dict {PACKAGE_PIN V22 IOSTANDARD LVCMOS33} [get_ports {P1[1]}]
set_property -dict {PACKAGE_PIN V23 IOSTANDARD LVCMOS33} [get_ports {P1[2]}]
set_property -dict {PACKAGE_PIN U24 IOSTANDARD LVCMOS33} [get_ports {P1[3]}]

set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS33} [get_ports {P1[4]}]
set_property -dict {PACKAGE_PIN AA23 IOSTANDARD LVCMOS33} [get_ports {P1[5]}]
set_property -dict {PACKAGE_PIN W23 IOSTANDARD LVCMOS33} [get_ports {P1[6]}]
set_property -dict {PACKAGE_PIN V24 IOSTANDARD LVCMOS33} [get_ports {P1[7]}]

#P2
#set_property -dict {PACKAGE_PIN U19 IOSTANDARD LVCMOS33} [get_ports IO24]
#set_property -dict {PACKAGE_PIN U14 IOSTANDARD LVCMOS33} [get_ports IO28]
#set_property -dict {PACKAGE_PIN U16 IOSTANDARD LVCMOS33} [get_ports IO27]
#set_property -dict {PACKAGE_PIN V16 IOSTANDARD LVCMOS33} [get_ports IO30]
#
#set_property -dict {PACKAGE_PIN T15 IOSTANDARD LVCMOS33} [get_ports IO25]
#set_property -dict {PACKAGE_PIN U15 IOSTANDARD LVCMOS33} [get_ports IO26]
#set_property -dict {PACKAGE_PIN V17 IOSTANDARD LVCMOS33} [get_ports IO31]
#set_property -dict {PACKAGE_PIN V14 IOSTANDARD LVCMOS33} [get_ports IO29]

set_property -dict {PACKAGE_PIN U19 IOSTANDARD LVCMOS33} [get_ports {P2[0]}]
set_property -dict {PACKAGE_PIN U14 IOSTANDARD LVCMOS33} [get_ports {P2[1]}]
set_property -dict {PACKAGE_PIN U16 IOSTANDARD LVCMOS33} [get_ports {P2[2]}]
set_property -dict {PACKAGE_PIN V16 IOSTANDARD LVCMOS33} [get_ports {P2[3]}]

set_property -dict {PACKAGE_PIN T15 IOSTANDARD LVCMOS33} [get_ports {P2[4]}]
set_property -dict {PACKAGE_PIN U15 IOSTANDARD LVCMOS33} [get_ports {P2[5]}]
set_property -dict {PACKAGE_PIN V17 IOSTANDARD LVCMOS33} [get_ports {P2[6]}]
set_property -dict {PACKAGE_PIN V14 IOSTANDARD LVCMOS33} [get_ports {P2[7]}]

#P3
#set_property -dict {PACKAGE_PIN J6 IOSTANDARD LVCMOS33} [get_ports IO16_P]
#set_property -dict {PACKAGE_PIN J5 IOSTANDARD LVCMOS33} [get_ports IO16_N]
#set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS33} [get_ports IO22_P]
#set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS33} [get_ports IO22_N]
#
#set_property -dict {PACKAGE_PIN L8 IOSTANDARD LVCMOS33} [get_ports IO20_P]
#set_property -dict {PACKAGE_PIN K8 IOSTANDARD LVCMOS33} [get_ports IO20_N]
#set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS33} [get_ports IO18_P]
#set_property -dict {PACKAGE_PIN F5 IOSTANDARD LVCMOS33} [get_ports IO18_N]

set_property -dict {PACKAGE_PIN J6 IOSTANDARD LVCMOS33} [get_ports {P3[0]}]
set_property -dict {PACKAGE_PIN J5 IOSTANDARD LVCMOS33} [get_ports {P3[1]}]
set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS33} [get_ports {P3[2]}]
set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS33} [get_ports {P3[3]}]

set_property -dict {PACKAGE_PIN L8 IOSTANDARD LVCMOS33} [get_ports {P3[4]}]
set_property -dict {PACKAGE_PIN K8 IOSTANDARD LVCMOS33} [get_ports {P3[5]}]
set_property -dict {PACKAGE_PIN G5 IOSTANDARD LVCMOS33} [get_ports {P3[6]}]
set_property -dict {PACKAGE_PIN F5 IOSTANDARD LVCMOS33} [get_ports {P3[7]}]

#P4
#set_property -dict {PACKAGE_PIN H8 IOSTANDARD LVCMOS33} [get_ports IO10_P]
#set_property -dict {PACKAGE_PIN G8 IOSTANDARD LVCMOS33} [get_ports IO10_N]
#set_property -dict {PACKAGE_PIN E6 IOSTANDARD LVCMOS33} [get_ports IO8_P]
#set_property -dict {PACKAGE_PIN D6 IOSTANDARD LVCMOS33} [get_ports IO8_N]
#
#set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS33} [get_ports IO12_P]
#set_property -dict {PACKAGE_PIN G7 IOSTANDARD LVCMOS33} [get_ports IO12_N]
#set_property -dict {PACKAGE_PIN F8 IOSTANDARD LVCMOS33} [get_ports IO14_P]
#set_property -dict {PACKAGE_PIN F7 IOSTANDARD LVCMOS33} [get_ports IO14_N]

set_property -dict {PACKAGE_PIN H8 IOSTANDARD LVCMOS33} [get_ports {P4[0]}]
set_property -dict {PACKAGE_PIN G8 IOSTANDARD LVCMOS33} [get_ports {P4[1]}]
set_property -dict {PACKAGE_PIN E6 IOSTANDARD LVCMOS33} [get_ports {P4[2]}]
set_property -dict {PACKAGE_PIN D6 IOSTANDARD LVCMOS33} [get_ports {P4[3]}]

set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS33} [get_ports {P4[4]}]
set_property -dict {PACKAGE_PIN G7 IOSTANDARD LVCMOS33} [get_ports {P4[5]}]
set_property -dict {PACKAGE_PIN F8 IOSTANDARD LVCMOS33} [get_ports {P4[6]}]
set_property -dict {PACKAGE_PIN F7 IOSTANDARD LVCMOS33} [get_ports {P4[7]}]

#==================================================
#usb1_2
set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS33} [get_ports FPGA_USB0_LOW]
set_property -dict {PACKAGE_PIN P25 IOSTANDARD LVCMOS33} [get_ports FPGA_USB0_FULL]
set_property -dict {PACKAGE_PIN M26 IOSTANDARD LVCMOS33} [get_ports FPGA_USB0_N]
set_property -dict {PACKAGE_PIN N26 IOSTANDARD LVCMOS33} [get_ports FPGA_USB0_P]
set_property -dict {PACKAGE_PIN R22 IOSTANDARD LVCMOS33} [get_ports FPGA_USB0_PWR_EN]
set_property -dict {PACKAGE_PIN T22 IOSTANDARD LVCMOS33} [get_ports FPGA_USB0_PWR_DET]

set_property -dict {PACKAGE_PIN R23 IOSTANDARD LVCMOS33} [get_ports FPGA_USB1_LOW]
set_property -dict {PACKAGE_PIN T25 IOSTANDARD LVCMOS33} [get_ports FPGA_USB1_FULL]
set_property -dict {PACKAGE_PIN P26 IOSTANDARD LVCMOS33} [get_ports FPGA_USB1_N]
set_property -dict {PACKAGE_PIN R26 IOSTANDARD LVCMOS33} [get_ports FPGA_USB1_P]
set_property -dict {PACKAGE_PIN T23 IOSTANDARD LVCMOS33} [get_ports FPGA_USB1_PWR_EN]
set_property -dict {PACKAGE_PIN R18 IOSTANDARD LVCMOS33} [get_ports FPGA_USB1_PWR_DET]

set_property -dict {PACKAGE_PIN H21 IOSTANDARD LVCMOS33} [get_ports CH3950_TX]
set_property -dict {PACKAGE_PIN H22 IOSTANDARD LVCMOS33} [get_ports CH3950_RX]
#==================================================
#gpio
set_property -dict {PACKAGE_PIN H9 IOSTANDARD LVCMOS33} [get_ports {GPIO[0]}]
set_property -dict {PACKAGE_PIN J8 IOSTANDARD LVCMOS33} [get_ports {GPIO[1]}]
set_property -dict {PACKAGE_PIN A5 IOSTANDARD LVCMOS33} [get_ports {GPIO[2]}]
set_property -dict {PACKAGE_PIN G9 IOSTANDARD LVCMOS33} [get_ports {GPIO[3]}]
set_property -dict {PACKAGE_PIN B5 IOSTANDARD LVCMOS33} [get_ports {GPIO[4]}]

set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS33} [get_ports {GPIO[5]}]
set_property -dict {PACKAGE_PIN A3 IOSTANDARD LVCMOS33} [get_ports {GPIO[6]}]
set_property -dict {PACKAGE_PIN B4 IOSTANDARD LVCMOS33} [get_ports {GPIO[7]}]
set_property -dict {PACKAGE_PIN B2 IOSTANDARD LVCMOS33} [get_ports {GPIO[8]}]
set_property -dict {PACKAGE_PIN A2 IOSTANDARD LVCMOS33} [get_ports {GPIO[9]}]

set_property -dict {PACKAGE_PIN F4 IOSTANDARD LVCMOS33} [get_ports {GPIO[10]}]
set_property -dict {PACKAGE_PIN D5 IOSTANDARD LVCMOS33} [get_ports {GPIO[11]}]
set_property -dict {PACKAGE_PIN G6 IOSTANDARD LVCMOS33} [get_ports {GPIO[12]}]
set_property -dict {PACKAGE_PIN C4 IOSTANDARD LVCMOS33} [get_ports {GPIO[13]}]
set_property -dict {PACKAGE_PIN H4 IOSTANDARD LVCMOS33} [get_ports {GPIO[14]}]

set_property -dict {PACKAGE_PIN D4 IOSTANDARD LVCMOS33} [get_ports {GPIO[15]}]
set_property -dict {PACKAGE_PIN J4 IOSTANDARD LVCMOS33} [get_ports {GPIO[16]}]
set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS33} [get_ports {GPIO[17]}]
set_property -dict {PACKAGE_PIN E5 IOSTANDARD LVCMOS33} [get_ports {GPIO[18]}]
set_property -dict {PACKAGE_PIN C2 IOSTANDARD LVCMOS33} [get_ports {GPIO[19]}]

set_property -dict {PACKAGE_PIN D3 IOSTANDARD LVCMOS33} [get_ports {GPIO[20]}]
set_property -dict {PACKAGE_PIN C3 IOSTANDARD LVCMOS33} [get_ports {GPIO[21]}]
set_property -dict {PACKAGE_PIN H6 IOSTANDARD LVCMOS33} [get_ports {GPIO[22]}]
set_property -dict {PACKAGE_PIN B1 IOSTANDARD LVCMOS33} [get_ports {GPIO[23]}]
set_property -dict {PACKAGE_PIN F3 IOSTANDARD LVCMOS33} [get_ports {GPIO[24]}]

set_property -dict {PACKAGE_PIN C1 IOSTANDARD LVCMOS33} [get_ports {GPIO[25]}]
set_property -dict {PACKAGE_PIN D1 IOSTANDARD LVCMOS33} [get_ports {GPIO[26]}]
set_property -dict {PACKAGE_PIN E2 IOSTANDARD LVCMOS33} [get_ports {GPIO[27]}]
set_property -dict {PACKAGE_PIN F2 IOSTANDARD LVCMOS33} [get_ports {GPIO[28]}]
set_property -dict {PACKAGE_PIN E1 IOSTANDARD LVCMOS33} [get_ports {GPIO[29]}]

set_property -dict {PACKAGE_PIN G4 IOSTANDARD LVCMOS33} [get_ports {GPIO[30]}]
set_property -dict {PACKAGE_PIN G2 IOSTANDARD LVCMOS33} [get_ports {GPIO[31]}]
set_property -dict {PACKAGE_PIN G1 IOSTANDARD LVCMOS33} [get_ports {GPIO[32]}]
set_property -dict {PACKAGE_PIN H3 IOSTANDARD LVCMOS33} [get_ports {GPIO[33]}]

#set_property -dict {PACKAGE_PIN K6 IOSTANDARD LVCMOS33} [get_ports IO22_N]
#set_property -dict {PACKAGE_PIN K7 IOSTANDARD LVCMOS33} [get_ports IO22_P]

####################################################################################
#Encryption Settings

set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]

set_property BITSTREAM.ENCRYPTION.ENCRYPT NO [current_design]
#set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT BBRAM [current_design]
#set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT eFUSE [current_design]
#set_property BITSTREAM.ENCRYPTION.KEY0 256'h12345678ABCDDCBA1234578ABCDDCBA1234578ABCDDCBA1234578ABCDDCBA [current_design]

set_property BITSTREAM.CONFIG.M0PIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.M1PIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.M2PIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.TCKPIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.TDIPIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.TDOPIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.TMSPIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN PULLNONE [current_design]

set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
#set_property CONFIG_MODE SPIx1 [current_design]


set_property BITSTREAM.CONFIG.INITSIGNALSERROR DISABLE [current_design]


set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]
set_property BITSTREAM.CONFIG.CCLKPIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.DONEPIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.INITPIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.PROGPIN PULLNONE [current_design]
set_property BITSTREAM.CONFIG.DCIUPDATEMODE QUIET [current_design]
set_property BITSTREAM.CONFIG.USR_ACCESS TIMESTAMP [current_design]
####################################################################################

create_debug_core u_ila_0 ila
set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
set_property C_DATA_DEPTH 32768 [get_debug_cores u_ila_0]
set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
set_property port_width 1 [get_debug_ports u_ila_0/clk]
connect_debug_port u_ila_0/clk [get_nets [list pll_inst/inst/clk_out1]]
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
set_property port_width 16 [get_debug_ports u_ila_0/probe0]
connect_debug_port u_ila_0/probe0 [get_nets [list {eeprom_i2c_ctrl_inst/addr[0]} {eeprom_i2c_ctrl_inst/addr[1]} {eeprom_i2c_ctrl_inst/addr[2]} {eeprom_i2c_ctrl_inst/addr[3]} {eeprom_i2c_ctrl_inst/addr[4]} {eeprom_i2c_ctrl_inst/addr[5]} {eeprom_i2c_ctrl_inst/addr[6]} {eeprom_i2c_ctrl_inst/addr[7]} {eeprom_i2c_ctrl_inst/addr[8]} {eeprom_i2c_ctrl_inst/addr[9]} {eeprom_i2c_ctrl_inst/addr[10]} {eeprom_i2c_ctrl_inst/addr[11]} {eeprom_i2c_ctrl_inst/addr[12]} {eeprom_i2c_ctrl_inst/addr[13]} {eeprom_i2c_ctrl_inst/addr[14]} {eeprom_i2c_ctrl_inst/addr[15]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
set_property port_width 2 [get_debug_ports u_ila_0/probe1]
connect_debug_port u_ila_0/probe1 [get_nets [list {eeprom_i2c_ctrl_inst/cmd[0]} {eeprom_i2c_ctrl_inst/cmd[1]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
set_property port_width 8 [get_debug_ports u_ila_0/probe2]
connect_debug_port u_ila_0/probe2 [get_nets [list {eeprom_i2c_ctrl_inst/wr_st[0]} {eeprom_i2c_ctrl_inst/wr_st[1]} {eeprom_i2c_ctrl_inst/wr_st[2]} {eeprom_i2c_ctrl_inst/wr_st[3]} {eeprom_i2c_ctrl_inst/wr_st[4]} {eeprom_i2c_ctrl_inst/wr_st[5]} {eeprom_i2c_ctrl_inst/wr_st[6]} {eeprom_i2c_ctrl_inst/wr_st[7]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
set_property port_width 8 [get_debug_ports u_ila_0/probe3]
connect_debug_port u_ila_0/probe3 [get_nets [list {eeprom_i2c_ctrl_inst/wr_data[0]} {eeprom_i2c_ctrl_inst/wr_data[1]} {eeprom_i2c_ctrl_inst/wr_data[2]} {eeprom_i2c_ctrl_inst/wr_data[3]} {eeprom_i2c_ctrl_inst/wr_data[4]} {eeprom_i2c_ctrl_inst/wr_data[5]} {eeprom_i2c_ctrl_inst/wr_data[6]} {eeprom_i2c_ctrl_inst/wr_data[7]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
set_property port_width 8 [get_debug_ports u_ila_0/probe4]
connect_debug_port u_ila_0/probe4 [get_nets [list {i2c_phy_inst/rd_data[0]} {i2c_phy_inst/rd_data[1]} {i2c_phy_inst/rd_data[2]} {i2c_phy_inst/rd_data[3]} {i2c_phy_inst/rd_data[4]} {i2c_phy_inst/rd_data[5]} {i2c_phy_inst/rd_data[6]} {i2c_phy_inst/rd_data[7]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
set_property port_width 5 [get_debug_ports u_ila_0/probe5]
connect_debug_port u_ila_0/probe5 [get_nets [list {i2c_phy_inst/st[0]} {i2c_phy_inst/st[1]} {i2c_phy_inst/st[2]} {i2c_phy_inst/st[3]} {i2c_phy_inst/st[4]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
set_property port_width 10 [get_debug_ports u_ila_0/probe6]
connect_debug_port u_ila_0/probe6 [get_nets [list {i2c_phy_inst/count[0]} {i2c_phy_inst/count[1]} {i2c_phy_inst/count[2]} {i2c_phy_inst/count[3]} {i2c_phy_inst/count[4]} {i2c_phy_inst/count[5]} {i2c_phy_inst/count[6]} {i2c_phy_inst/count[7]} {i2c_phy_inst/count[8]} {i2c_phy_inst/count[9]}]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
set_property port_width 1 [get_debug_ports u_ila_0/probe7]
connect_debug_port u_ila_0/probe7 [get_nets [list i2c_phy_inst/ack]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
set_property port_width 1 [get_debug_ports u_ila_0/probe8]
connect_debug_port u_ila_0/probe8 [get_nets [list i2c_phy_inst/done]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
set_property port_width 1 [get_debug_ports u_ila_0/probe9]
connect_debug_port u_ila_0/probe9 [get_nets [list i2c_phy_inst/reg_scl]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
set_property port_width 1 [get_debug_ports u_ila_0/probe10]
connect_debug_port u_ila_0/probe10 [get_nets [list i2c_phy_inst/reg_sda]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
set_property port_width 1 [get_debug_ports u_ila_0/probe11]
connect_debug_port u_ila_0/probe11 [get_nets [list i2c_phy_inst/sel_scl]]
create_debug_port u_ila_0 probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
set_property port_width 1 [get_debug_ports u_ila_0/probe12]
connect_debug_port u_ila_0/probe12 [get_nets [list i2c_phy_inst/sel_sda]]
set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
connect_debug_port dbg_hub/clk [get_nets sys_clk_50m]
